From File to Pixel · Part 04: The Shader

07 From File to Pixel — Compilation Pipeline

A shader file is text. A pixel on screen is the result of running compiled machine code on a GPU. Between those two points lies a compilation pipeline with 6–8 stages, each with its own failure modes, performance implications, and platform differences. Understanding this pipeline is the prerequisite for diagnosing shader stutter, variant bloat, and cross-platform discrepancies.

Compilation Stages: Source → ISA

Shader Variants — Combinatorial Explosion

Every #pragma multi_compile A B C multiplies your total shader count. Three such pragmas with 3 keywords each produce 27 variants. Five pragmas produce 243. Unity compiles all variants unless you strip them explicitly — this is why shader compilation takes minutes on large projects.

// Unity — IPreprocessShaders: strip variants at build time
// Runs in Editor before build — removes unused variants from build output
class MyShaderStripper : IPreprocessShaders
{
    public int callbackOrder => 0;

    public void OnProcessShader(
        Shader shader,
        ShaderSnippetData snippet,
        IList<ShaderCompilerData> data)
    {
        // Strip all variants that have _EXPENSIVE_FEATURE_ON
        // unless the current build target needs them
        for (int i = data.Count - 1; i >= 0; i--)
        {
            if (data[i].shaderKeywordSet.IsEnabled(
                new ShaderKeyword("_EXPENSIVE_FEATURE_ON"))
                && !NeedsExpensiveFeature(snippet))
            {
                data.RemoveAt(i); // stripped — not compiled into build
            }
        }
    }
}

// ── DXC: compile HLSL → SPIR-V from command line ─────────
// dxc -spirv -T vs_6_5 -E vert shader.hlsl -Fo shader.vert.spv
// dxc -spirv -T ps_6_5 -E frag shader.hlsl -Fo shader.frag.spv
// Add -Od for debug info, -O3 for release optimization

08 GPU Instancing Patterns

Instancing is the primary mechanism for rendering thousands of identical (or near-identical) meshes with minimal CPU overhead. The right pattern depends on whether data is static or dynamic, how frequently transforms update, and whether you're in a legacy or modern pipeline.

Pattern Details

SRP Batcher — automatic, zero shader changes

The SRP Batcher is not instancing — it batches SetPass calls, not draw calls. Each object still gets its own draw call, but the GPU state (shader + material) is cached. It activates automatically when your shader wraps per-material properties in CBUFFER_START(UnityPerMaterial).

// SRP Batcher compatible shader — ONE requirement
CBUFFER_START(UnityPerMaterial)
    float4 _BaseColor;
    float  _Roughness;
    float  _Metallic;
    // ALL per-material properties must be inside this CBUFFER
    // SRP Batcher caches this block between draws — no re-upload
CBUFFER_END

// Per-object built-in data is automatically in UnityPerDraw CBUFFER
// (unity_ObjectToWorld, unity_WorldToObject, etc.)
// Both must be CBUFFERed — then Batcher activates

GPU Instancing — per-instance varying data

// Shader — declare instanced property
UNITY_INSTANCING_BUFFER_START(InstanceProps)
    UNITY_DEFINE_INSTANCED_PROP(float4, _Color)
    UNITY_DEFINE_INSTANCED_PROP(float,  _Scale)
UNITY_INSTANCING_BUFFER_END(InstanceProps)

Varyings vert(Attributes input, UNITY_VERTEX_INPUT_INSTANCE_ID)
{
    UNITY_SETUP_INSTANCE_ID(input);
    float4 color = UNITY_ACCESS_INSTANCED_PROP(InstanceProps, _Color);
    // use color in vertex or pass to fragment via Varyings
    ...
}

// C# — set per-instance data via MaterialPropertyBlock
var block = new MaterialPropertyBlock();
for (int i = 0; i < count; i++) {
    block.SetColor("_Color", colors[i]);
    renderer.SetPropertyBlock(block, i); // per-instance block
}

DrawMeshInstancedIndirect — GPU-driven, zero CPU per instance

// C# — setup indirect args buffer
// Args: [indexCount, instanceCount, startIndex, baseVertex, startInstance]
uint[] args = new uint[] { mesh.GetIndexCount(0), 0, 0, 0, 0 };
argsBuffer = new ComputeBuffer(1, args.Length * sizeof(uint),
    ComputeBufferType.IndirectArguments);
argsBuffer.SetData(args);

// Compute shader writes instance count after GPU culling:
// RWBuffer<uint> _ArgsBuffer; → _ArgsBuffer[1] = visibleCount;

// C# — draw call (zero per-instance CPU work)
Graphics.DrawMeshInstancedIndirect(
    mesh, 0, material, bounds, argsBuffer);

// HLSL shader — read instance data from StructuredBuffer
StructuredBuffer<float4x4> _InstanceMatrices;

Varyings vert(Attributes input, uint instanceID : SV_InstanceID)
{
    float4x4 mat = _InstanceMatrices[instanceID];
    output.posCS = mul(mat, float4(input.posOS, 1.0));
    ...
}

09 HLSL / GLSL / MSL — Cross-Language Reference

All three shader languages express the same GPU concepts — vertex transformation, texture sampling, compute dispatch — with different syntax and slightly different semantics. If you know one, the others are an afternoon of pattern matching. The table below is that pattern match.

Syntax Equivalence

Precision Qualifiers Across Languages

10 Compute Shaders

Compute shaders run outside the graphics pipeline — no vertex stage, no rasterization, no fixed render targets. They dispatch arbitrary parallel workloads on the GPU: particle simulation, physics, GPU culling, procedural generation, post-processing. Every modern GPU supports them. They are the primary tool for GPU-driven rendering.

Execution Model · Thread Groups · Shared Memory

A compute dispatch is a 3D grid of thread groups. Each thread group is a 3D block of threads. The total thread count is groups.x × groups.y × groups.z × numthreads.x × numthreads.y × numthreads.z.

Thread Group Size Selection

Common Patterns

Pattern 1: Parallel Reduction (sum / max / min)

// HLSL — parallel reduction using wave intrinsics (DXC SM6.0+)
// Step 1: each thread reduces its element
// Step 2: wave intrinsic reduces across the wave in one instruction
// Step 3: one thread per wave writes to groupshared
// Step 4: first wave reduces groupshared values

RWBuffer<float> _Input;
RWBuffer<float> _Output;
groupshared float gs_waveResults[32]; // max 32 waves per group

[numthreads(256, 1, 1)]
void CSReduce(uint tid : SV_DispatchThreadID,
              uint lid : SV_GroupIndex,
              uint3 gid : SV_GroupID)
{
    float val = (tid < _Count) ? _Input[tid] : 0.0f;

    // Wave-level reduction — one hardware instruction on NVIDIA/AMD
    val = WaveActiveSum(val); // sum across all active lanes in wave

    // One thread per wave writes to groupshared
    if (WaveIsFirstLane())
        gs_waveResults[lid / WaveGetLaneCount()] = val;

    GroupMemoryBarrierWithGroupSync(); // wait for all waves

    // First wave reduces the per-wave results
    if (lid < WaveGetLaneCount()) {
        float waveVal = (lid < ceil(256.0/WaveGetLaneCount()))
                        ? gs_waveResults[lid] : 0.0f;
        waveVal = WaveActiveSum(waveVal);
        if (lid == 0) _Output[gid.x] = waveVal;
    }
}

Pattern 2: Tiled Algorithm (screen-space lighting)

// HLSL — Tiled Forward lighting: cull lights per tile in compute
// Classic approach: 16×16 tile = 256 threads = one dispatch per frame

#define TILE_SIZE 16
#define MAX_LIGHTS_PER_TILE 256

groupshared uint  gs_minDepth;
groupshared uint  gs_maxDepth;
groupshared uint  gs_lightCount;
groupshared uint  gs_lightIndices[MAX_LIGHTS_PER_TILE];

[numthreads(TILE_SIZE, TILE_SIZE, 1)]
void CSLightCull(
    uint2 gid  : SV_GroupID,
    uint2 tid  : SV_DispatchThreadID,
    uint  lid  : SV_GroupIndex)
{
    // Step 1: init tile depth range in groupshared
    if (lid == 0) {
        gs_minDepth  = 0x7F7FFFFF; // max float as uint
        gs_maxDepth  = 0;
        gs_lightCount = 0;
    }
    GroupMemoryBarrierWithGroupSync();

    // Step 2: each thread contributes its pixel's depth
    float depth = _DepthBuffer[tid].r;
    uint  uDepth = asuint(depth);
    InterlockedMin(gs_minDepth, uDepth);
    InterlockedMax(gs_maxDepth, uDepth);
    GroupMemoryBarrierWithGroupSync();

    // Step 3: distribute light culling across threads
    // Each thread tests one light against tile frustum
    for (uint i = lid; i < _LightCount; i += TILE_SIZE * TILE_SIZE)
    {
        if (LightIntersectsTile(_Lights[i], gid, gs_minDepth, gs_maxDepth))
        {
            uint idx;
            InterlockedAdd(gs_lightCount, 1, idx);
            if (idx < MAX_LIGHTS_PER_TILE)
                gs_lightIndices[idx] = i;
        }
    }
    GroupMemoryBarrierWithGroupSync();

    // Step 4: write tile light list to global buffer
    uint tileIdx = gid.y * _TilesX + gid.x;
    _TileLightCounts[tileIdx] = gs_lightCount;
    for (uint j = lid; j < gs_lightCount; j += TILE_SIZE * TILE_SIZE)
        _TileLightIndices[tileIdx * MAX_LIGHTS_PER_TILE + j] = gs_lightIndices[j];
}